How does the timmer works-

Timers Basic Overview

Atmega 16 has following timers,

• Timer 0, 8 bit
• Timer 1, 16 bit consisting of two 8 bit parts, A and B
• Timer 2, 8 bit

Now there are two clocks,

• System Clock (fs): This is the clock frequency at which Atmega is running. By default it is 1 MHz which can be changed by setting fuse bits.

• Timer Clock (ft): This is the clock frequency at which timer module is running. Each timer module has different clocks.

Now ft can be in ratios of fs. That is, ft = fs, fs/8, fs/64 ...

For example, if we keep fs = 8 MHz then available options for ft are: 8 MHz, 1 MHz, 125 KHz ... (look in the image)

There are total 4 settings for Timers,

• Clock Source: Source for timer clock, keep it as system clock. You can also provide external clock. Read datasheet for more information about external clock source.

• Clock value: This is value of ft. Drop down for available options of ft. Chose whichever is required

• Mode: There are many modes of timers. We will be discussing following 2 modes,

• Fast PWM top = FFh
• CTC top=OCRx (x=0, 1A, 2)

• Output: Depending upon the mode we have chosen there are options for output pulse. We will look in detail later.

Basically each Timer has a counter unit with size 8 bit for Timer 0, 2 and 16 bit for Timer 1. I will be talking about Timer 0 and same will follow for other Timers.

Each counter has a register which increments by one on every rising edge of timer clock. After counting to its full capacity, 255 for 8 bit, it again starts from 0. By using this register we can have different modes.

• Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers.

• TOP: The counter reaches the TOP when it becomes equal to the highest value in the count sequence. The TOP value can be assigned to be the fixed value 0xFF (MAX) or the value stored in the OCR0 Register. The assignment is dependent on the mode of operation.

Fast PWM Mode

PWM = Pulse Width Modulation.

This mode is used to generate pulse with

• Fixed Frequency (F)
• Variable Duty Cycle (D)

F = Ft / 256

D = OCR0 / 255 (non inverted output)

D = (255-OCR0) / 255 (inverted output)

By changing OCR0 value we can change the duty cycle of the output pulse.

As OCR0 is an 8bit register it can vary from 0 to 255.

0 ≤ OCR0 ≤ 255

Pins for Output pulse,

Timer 0 : OC0, pin 4
Timer 1A : OC1A, pin 19
Timer 1B : OC1B, pin 18
Timer 2 : OC2, pin 21

CTC Mode

CTC = Clear Timer on Compare Match.

This mode is to generate pulse with,

• Fixed Duty Cycle (D = 0.5)
• Variable Frequency (F)

F = ft / 2 (1+OCR0)

(corrected on 8th Feb, thanks to Ankur for pointing mistake)

D = 0.5

By changing value of OCR0 we can change the value of output pulse frequency. As OCR0 is an 8bit register it can vary from 0 to 255.

0 ≤ OCR0 ≤ 255